[行业软件]Cadence Joules RTL Power Solution 21.16.000-ISR6 Linux Hotfix [复制链接]

Cadence Design Systems, Inc. , the leader in global electronic design innovation, has unveiled Cadence Joules RTL Power Solution 21.16.000-ISR6 Hotfix. This solution delivering time based RTL power analysis with system-level runtimes and capacity, as well as high-quality estimates of gates and wires based on production implementation technology.


CCRs fixed in 21.16


CCMPR02204978 Ideal Power need to support Latch cell
CCMPR02488727 etc/rtls/tutorial/libraries/LIB/typical.lib error occur
CCMPR02583403 Requirement to run all ODC/STB scrubbers in one session
CCMPR02587193 Joules does not combine single FFs during CG insertion
CCMPR02587200 Joules can not handle if duty 1 and 0 are mixed in register bank
CCMPR02587221 Support multicycle for enable forwarding stability
CCMPR02592881 xreplay need to support multiple mapfile with -rtl_block/-gate_block option
CCMPR02656940 ODC/STB HTML detailed report generation
CCMPR02673622 Improve correlation by enhancing tune_ple to separate clock_comb and clock_seq
CCMPR02676518 Joules crash during compute_ideal_power
CCMPR02684206 Support for -report_missing_signals <all|stim|design> -out missing.rpt in xreplay/xreplay_stimulus
CCMPR02685490 Crash with report_stb with dumping power info
CCMPR02691853 Report power/compute power SDPD arcs have an extra default arc that does not match stimulus
CCMPR02701207 SEGV in Joules child processes while running replay_stimulus in Genus
CCMPR02702347 When Cond is wrong at "set_db stim_arc_monitor_bbox_as_memory 1"
CCMPR02703611 read_stimulus -append crashes after compute_odc -run_logic_opt
CCMPR02704134 implement_odc -modify_activity error due to containing ungroup separator "\/" in pin object
CCMPR02709282 Xreplay with -trace_arcs mem flow produces empty SAIF when design has no memories
CCMPR02710149 Long runtime in read_stimulus RT with -resim
CCMPR02711599 Joules is crashing while writing out HTML after read_stimulus report_ODC -gen_html -html_out_dir ODC_with_pwr
CCMPR02715351 Error: -xreplay_output_format can only be a time based format when Joules is used to dump the sdpd
CCMPR02715370 -trace_arc memory with xreplay dumping saif for only memory data
CCMPR02716215 Issue occur again : Joules -batch shouldn't suspend at plot_power_profile -format {gnuplot|native} -out {file}
CCMPR02718336 Joules replay_stimulus command in Innovus exiting without any Error/Issue in flow
CCMPR02718832 -show_depth should also display the depth of existing enable in additional to ODC enable depth
CCMPR02718835 ODC opportunities should also show the register driver pin of ODC enable expression nets
CCMPR02721695 xreplay_stimulus
CCMPR02724069 Crash in report_odc with power saving infra code
CCMPR02724854 Need merge_stimulus support in Innovus replay_stimulus
CCMPR02725028 Need to echo joules.log to genus.log when running apply_cglar
CCMPR02730609 syn_generic use excessive memory usage & fail due to insert_sequential_cg
CCMPR02730678 apply_data_gating: backgound joules job crashes when specifying -inst option
CCMPR02739832 Lot of empty .txt files generated for ODC HTML report
Getting an accurate measure of RTL power consumption during design exploration has long been a major challenge for SoC design teams. Another challenge is getting consistent power through the design progress from RTL to P&R, because different tools are used at different stages of the design. System-level verification tools have the capacity to exercise real use cases but they are disconnected from the implementation tools that translate RTL to gates and wires. The Cadence Joules RTL Power Solution closes this gap by delivering timebased RTL power analysis with system-level runtimes and capacity, as well as high-quality estimates of gates and wires based on production implementation technology. The Joules RTL Power Solution integrates seamlessly with the Cadence Palladium emulation platforms and the Stratus High-Level Synthesis (HLS) platform for early system-level power 2.0% analysis and optimization. The Cadence Genus Synthesis Solution integrates the Joules solution for accurate power analysis and unrivaled dynamic power efficiency results.

Joules RTL Power Solution







Cadence is a pivotal leader in electronic design and computational expertise, using its Intelligent System Design strategy to turn design concepts into reality. Cadence customers are the world’s most creative and innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications.

Product: Cadence Joules RTL Power Solution
Version: 21.16.000-ISR6 Hotfix
Supported Architectures: lnx86
Website Home Page : www.cadence.com
Languages Supported: english
System Requirements: Linux *
Size: 1.8 Gb


* System Requirements:

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Cadence Joules RTL Power Solution 21.16.000-ISR6 Linux Hotfix

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